PC requirements for a frame grabber: PCIe slots lanes and chipset

Buying the frame grabber is half the decision; the other half is the PC it goes into. A board that streams a line-scan camera at full rate in the lab can drop lines in a chassis whose second slot is wired x1 off the chipset. This checklist covers the host side: the slot width each interface needs, where the lanes come from, the power and BIOS settings the card expects, and a worked bandwidth example you can copy onto your own spec. You will read a motherboard lane table and know within minutes whether a given PC holds full rate.

The decision, in one paragraph

Give every frame grabber a PCIe slot wired x4 electrically or wider: Gen 2 x4 is the floor, Gen 3 x4 is the default we specify. Feed it from CPU lanes or from a chipset with a spare uplink, keep 75 W of slot power available, and switch on Above 4G decoding in BIOS. That sentence covers GigE NICs, Camera Link boards and CoaXPress boards up to four CXP-6 links. Boards with eight CXP-6 links, CXP-12 links or multiple 10GigE ports move up to x8. The network-card corner of the question is covered separately in PCIe slot compatibility for GigE cameras; everything else follows from bandwidth arithmetic.

The bandwidth the slot must carry

Three numbers set the slot: what the camera produces, what the camera link carries, and what the slot sustains.

Per-lane raw rate, one direction: Gen 1 = 250 MB/s, Gen 2 = 500 MB/s, Gen 3 = 985 MB/s, Gen 4 = about 1,970 MB/s. The 0.8 factor is the honest planning number, because packet headers, interrupts and a host that also runs a GPU never leave the bus at line rate. The 1.25 headroom is what lets you add a camera later without re-planning the chassis.

Camera-side planning numbers:

Add cameras, never average them: four GigE cameras on one quad-port card is 400 MB/s of DMA before the card's own overhead. The LS-FGB-0004 is a PCIe x4, 4-port PoE Gigabit Ethernet card, and that x4 wiring is exactly why.

At the top of the range, the MV-GT2104 is a quad-port copper 10GbE NIC; the MV-GS1104F-DF is a 4-port XoF frame grabber with 40G total bandwidth supported and an SFP+ slot. Boards at that level belong in x8 slots.

Slot-side numbers, using the same 0.8 factor:

For how frames actually cross that bus into host memory, read frame grabber image acquisition for Camera Link and CoaXPress; the slot only has to keep up with it.

Read the wiring, not the socket

A x16 socket promises nothing. Boards wire slots economically: the second x16 socket is often x4 electrical, and a x1 slot with an open end accepts a wide card at x1 speed. Three checks settle it:

1. The lane table in the board manual. A row reading 'PCIe 3.0 x4 (x16 slot)' means x16 mechanically and x4 electrically; that x4 is what your grabber receives.
2. lspci -vv after install: LnkCap is the slot's capability, LnkSta the width negotiated now. If they disagree, the socket is wider than its wiring or another card claimed the lanes.
3. Riser cards in slim chassis: inexpensive risers wire x1, and bifurcated risers need the BIOS bifurcation set to match (x4x4 or x8x8) or they enumerate nothing.

Mechanics ride along with width. Full-height brackets need a full-height slot and cover clearance; the MV-GE2002P, a dual-port PoE GigE card, ships full height. If you are matching a board already on a shelf, identify a frame grabber model from its part numbers before hunting for its manual.

Chipset lanes versus CPU lanes

Where the slot's lanes come from decides how the number behaves under load. A desktop CPU brings roughly 16 lanes to the slots and 4 to the first M.2 socket; the chipset hangs every other slot, plus USB and the onboard NIC, off a single x4 uplink, about 3.9 GB/s on Gen 3 boards and 7.9 GB/s on Gen 4, shared with the SSD. Two teardowns show the pattern well: how a consumer desktop board allocates its PCIe lanes, and PCIe lane planning on server boards, where dozens of CPU-attached lanes remove the sharing problem entirely.

Commit like this:

• One grabber, no discrete GPU: any x4 electrical slot holds full rate.
• Grabber plus GPU: put both on the CPU-attached x16, split x8/x8 in BIOS.
• Two grabbers plus GPU: main grabber on the CPU x8, second on the chipset, workable up to about 1.6 GB/s of combined DMA.
• Three or more grabbers, an octo-link CoaXPress board, or several GPUs: a workstation or server board with 48 to 128 CPU lanes. At that scale, the MV-GX1008 is an octo CXP-6 frame grabber.

Worked example: sizing the slot for an 8k line-scan camera at 60 kHz

Inputs, each from a spec sheet: an 8,192-pixel, 8-bit mono line-scan camera; a web running 12 m/s; imaging that needs 0.2 mm per pixel across the web.

Line rate = web speed / pixel size = 12 m/s / 0.0002 m = 60,000 lines/s.

Camera output = 8,192 bytes per line x 60,000 lines/s = 491,520,000 B/s, call it 492 MB/s.

Link choice: one CXP-6 link carries about 600 MB/s usable, a 22% margin on a cable you cannot upgrade later, so commit to two links (1,200 MB/s usable) or buy CXP-12 from the start.

Slot requirement = 492 x 1.25 = 615 MB/s sustained. Test the candidates:

• Gen 2 x1: 500 x 0.8 = 400 MB/s. Fails. The camera caps at 400,000,000 / 8,192 = about 48,800 lines/s, so the web slows to 9.8 m/s or lines drop.
• Gen 3 x1: 985 x 0.8 = about 790 MB/s. Passes with 28% margin, one camera only.
• Gen 2 x4: 2,000 x 0.8 = 1,600 MB/s. Passes, and a second identical camera later needs 2 x 615 = 1,230 MB/s, still inside 1,600.

Decision: order the PC with a Gen 3 x4 electrical slot; accept Gen 2 x4 only if a second camera is off the table. Camera Link Full would also carry the 492 MB/s under its 680 MB/s ceiling, but it fails the same way on Gen 2 x1, so the slot decision does not change. The threshold to remember is 615 MB/s sustained: anything below it caps line rate, and web speed caps with it. Once the slot is right, set the line rate of a line-scan camera to match the encoder.

The checklist, stage by stage

Before you order the PC

1. One x4 electrical slot per grabber; x8 for eight-link CoaXPress, CXP-12 or multi-port 10GigE boards. Width sets everything else.
2. No slot you plan to use reads 'x16 (x1 mode)' in the lane table. That socket is a straw.
3. A CPU-attached slot for the main grabber whenever a discrete GPU lives in the machine; sharing the chipset uplink with a GPU and an SSD shows up as frame jitter.
4. Full-height bracket space and cover clearance, or a low-profile card if the chassis is slim.
5. 75 W of slot power per card, an auxiliary connector for quad-PoE boards, and a PSU sized for the full machine. Feed lights and controllers from a dedicated supply such as the LRS-75-48, a 48 V 76.8 W industrial unit, not from the PC.

At bring-up

6. Install the grabber driver before the vision software; acquisition libraries bind to the driver's API, not the other way round.

7. BIOS: Above 4G Decoding enabled, ASPM disabled, VT-d on if the driver uses it.
8. lspci -vv shows the negotiated width you expected; LnkSta reading x1 on a x4 card means the slot or the riser is lying.
9. Ten minutes at full camera rate with the dropped-frame counter visible. If frames go missing, find the frame-rate bottleneck before blaming the camera.

Cabling and I/O

10. Trigger and encoder wiring through a frame grabber I/O cable, DB9F to open, 7 m, such as the LS-CBL-0224. Label the pinout on the cabinet door before commissioning.

11. Camera Link runs on matched cables: a 5 m SDR-to-SDR cable such as the LS-CBL-0191 covers most bench distances, and long full-rate runs need a lower pixel clock.
12. Several cameras on one card: assign cameras to ports reliably so a swapped cable does not re-enumerate the system.
13. Planning a sensor upgrade later? The same arithmetic drives camera and frame grabber compatibility for resolution upgrades.

When the usual answer is wrong

• 'Any free x16 slot will do.' Only if its wiring is x4 or better; the second x16 socket on many desktop boards is x4 electrical, and on budget boards x1.
• 'It is only one camera.' A quad-port GigE card loaded with four cameras sits at 400 MB/s, exactly the sustained ceiling of Gen 2 x1, with zero margin. Take the x4.
• 'The chipset slot ran fine at 30 fps.' Add image archiving and the SSD steals the uplink mid-acquisition; deterministic streaming belongs on CPU lanes.
• 'The riser worked in the old chassis.' Slim industrial risers are commonly x1, so a moved grabber silently drops to 400 MB/s.
• Laptops have no PCIe slots at all, so check the full interface chain before promising one; Thunderbolt adapters cap well below a x4 slot.
• Embedded hosts expose few lanes and accept only specific pixel formats on the capture path; bringing a PCIe frame grabber up on an embedded AI host shows how that surfaces.

Before you click order

• Slot: x4 electrical, Gen 3 preferred, lane origin known from the manual's table.
• Power: 75 W slot, auxiliary feed for PoE, PSU margin for the whole machine.
• BIOS: Above 4G Decoding available and ASPM controllable.
• Bracket and chassis: full-height fits with the cover on.
• Bench test booked: full rate, ten minutes, dropped-frame counter visible.

Narrow it to parts in the frame grabber finder, or let the configurator walk the whole chain from camera to cable:

If the lane table still reads like tea leaves, bring the camera's data sheet to the contact page and we will size the slot with you.